IBM and Micron Technolgies, Inc, announced on December 1 that Micron will be producing a new memory product, Hybrid Memory Cube (HMC), using IBM's Through Silicon Vias (TSV) chip making technology. This new process will enable Micron to produce memory that is 15 times faster than current offerings, using 70% less power and taking 10% of the space.
HMC features multiple, stacked chips, connected by vertical pipelines, known as "vias". The chips will be produced using IBMs 32nm high-K metal gate process technology. A stack of individual chips is connected using TSVs, which create an electrical conduit between the chips. Current HMC prototypes provide bandwidth of 128 GB/s, compared to current state-of-the-art offerings at 12.8 GB/s. Details of the technology used to create these TSVs will be presented on December 5 at the IEEE International Electron Devices Meeting.
Compared to current DRAM modules, the bandwidth increase is up to 15 times. Coupled with a reduced latency and the smaller physical size of the chips, we can expect memory with vastly superior performance and much large capacities than is currently available. The logic layer which sits below the memory chips makes it possible to use HMCs in a wide range of devices and applications, and will initially offer high-performance in large-scale networking solutions and HPCs, eventually reaching consumer PCs and other devices.
"This is a milestone in the industry move to 3D semiconductor manufacturing," said Subu Iyer, IBM Fellow. "The manufacturing process we are rolling out will have applications beyond memory, enabling other industry segments as well. In the next few years, 3D chip technology will make its way into consumer products, and we can expect to see drastic improvements in battery life and functionality of devices." (cpu-world)
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